Technical Field
The present embodiments generally relate to content addressable memory cells. More specifically, the present embodiments relate to the design and layout of content addressable memory cells.
Description of the Prior Art
Content addressable memory cells (CAMs) are widely used in applications where extremely fast searching of data is required. For instance, memory based on CAM cells can be used to quickly address content in a database. The memory based on CAM cells can compare input search data (tag) against a table of stored data and return an address of matching data in the database. In contrast to dynamic random access memory (DRAM), wherein each cell consists of a single transistor and a single capacitor, the CAM cell comprises multiple transistors performing data write and data compare functions. Further, the CAM cells are united by a plurality of various logical gates for performing logical functions on match results generated by each of the CAM cells. Thus in contrast to DRAM memory the memory based on CAM cells requires optimum allocation on a die of various components of the CAM cells and the logical gates as well.